The present invention relates to a selective call receiver with display.
In recent years, many selective call receivers with display have been announced. The display function simply consists of displaying numerical figures. Most of the devices employ a dedicated large scale integrated circuit (LSI) to serve as a decoder. However, in general, large costs and much time are required for developing dedicated LSI's for specific purposes. Further, to change its functions, the LSI must be redesigned. Moreover a single chip LSI has difficulties with incorporating many display functions.
Attempts have been made to eliminate the above-mentioned problems associated with decoder LSI's by constructing the decoder using a single chip central processing unit (CPU). In this case, however, the power supply must be limited to dry cells since the device is a small portable receiver. In other words, the device must be operated on a small power-supply voltage. This causes the processing speed of the CPU to be decreased, and makes it difficult to process the data at high speeds. Therefore, when an operation, such as for error correction, containing many steps is being executed, the alert tone operation is often interrupted for short periods of time. Moreover, size limitations are imposed on the read-only memory (ROM) areas and on the random acess memory (RAM) areas and, hence, the program is limited. This, in other words, imposes limitations on the fundamental functions of the decoder, and makes it difficult to meet the user's requirements. Further, when alpha characters and katakana (square form of kana letters) characters are to be displayed in addition to numerical figures, it will become more difficult to achieve the desired performance from a single chip CPU.